JATINDER THAKUR1; NISHANT2. The Design and Implementation of 32-Bit Arithmetic Divider and Multiplier using Single Stage Design. International Journal of Advances in Scientific Research and Engineering (IJASRE), ISSN:2454-8006, DOI: 10.31695/IJASRE, [S. l.], v. 3, n. 5, p. 192–199, 2017. Disponível em: https://ijasre.net/index.php/ijasre/article/view/438. Acesso em: 25 nov. 2024.