Jatinder Thakur1 and Nishant2 (2017) “The Design and Implementation of 32-Bit Arithmetic Divider and Multiplier using Single Stage Design”, International Journal of Advances in Scientific Research and Engineering (IJASRE), ISSN:2454-8006, DOI: 10.31695/IJASRE, 3(5), pp. 192–199. Available at: https://ijasre.net/index.php/ijasre/article/view/438 (Accessed: 25 November 2024).